Mobile devices, such as but not limited to personal data appliances, cellular phones, radios, pagers, lap top computers, and the like are required to operate for relatively long periods before being recharged. These mobile devices usually include one or more processors as well as multiple memory modules and other peripheral devices.
In order to reduce the power consumption of mobile devices various power consumption control techniques were suggested. A first technique includes reducing the clock frequency of the mobile device. A second technique is known as dynamic voltage scaling (DVS) or alternatively is known as dynamic voltage and frequency scaling (DVFS) and includes altering the voltage that is supplied to a processor as well as altering the frequency of a clock signal that is provided to the processor in response to the computational load demands (also referred to as throughput) of the processor. Higher voltage levels are associated with higher operating frequencies and higher computational load but are also associated with higher energy consumption.
The power consumption of a transistor-based device is highly influenced by leakage currents that flow through the transistor. The leakage current is responsive to various parameters including the threshold voltage (Vt) of the transistor, the temperature of the transistor, and the like. Transistors that have higher Vt are relatively slower but have lower leakage currents while transistors that have lower Vt are relatively faster but have higher leakage current.
U.S. patent application 20020005750 of Kao et al., titled “Adaptive body biasing circuit and method” describes a method for adapting the speed of a certain transistor to a required operational frequency, by biasing the body (or well) of a transistor and as a result altering the threshold voltage Vt of the transistor. The delay of a matched circuit is compared to a required delay and as a result compensating bias voltages are provided to transistors within a compensating circuit. The patent application describes a test circuit that operates at the operational frequency of the transistor.
There is a need to provide a method for reducing leakage current of transistors.